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ADuC7060
I 2 C Common Registers
I 2 C FIFO Status, I2CFSTA, Register
Table 1 03. I2CFSTA MMR Bit Designations
Bit Name Description
Name:
I2CFSTA
15:10
Reserved bits.
Address:
Default value:
Access:
Function:
0xFFFF094C
0x0000
Read and write
These 16-bit MMRs contain the status of the
receive/transmit FIFOs in both master and
slave modes.
9
8
7:6
5:4
I2CFMTX
I2CFSTX
I2CMRXSTA
I2CMTXSTA
Set this bit to 1 to flush the master
transmit FIFO.
Set this bit to 1 to flush the slave transmit
FIFO.
I 2 C master receive FIFO status bits.
[00] = FIFO empty.
[01] = byte written to FIFO.
[10] = 1 byte in FIFO.
[11] = FIFO full.
I 2 C master transmit FIFO status bits.
[00] = FIFO empty.
[01] = byte written to FIFO.
[10] = 1 byte in FIFO.
[11] = FIFO full.
3:2
1:0
I2CSRXSTA
I2CSTXSTA
I 2 C slave receive FIFO status bits.
[00] = FIFO empty
[01] = byte written to FIFO
[10] = 1 byte in FIFO
[11] = FIFO full
I 2 C slave transmit FIFO status bits.
[00] = FIFO empty.
[01] = byte written to FIFO.
[10] = 1 byte in FIFO.
[11] = FIFO full.
Rev. 0 | Page 90 of 100
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